Name
Abstract | ||
|---|---|---|
Since pre-silicon functional verification is insufficient to detect all design errors, re-spins are often needed due to malfunctions that escape into the silicon. This paper presents an automated software solution to analyze the data collected during silicon debug. The proposed methodology analyzes the test sequences to detect suspects in both the spatial and the temporal domain. A set of software debug techniques are proposed to analyze the acquired data from the hardware testing and provide suggestions for the setup of the test environment in the next debug session. A comprehensive set of experiments demonstrate its effectiveness in terms of run-time and resolution. |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1109/DATE.2009.5090807 | DATE |
Keywords | Field | DocType |
automated software solution,next debug session,proposed methodology,comprehensive set,software debug technique,automated data analysis solution,design error,test environment,silicon debug,test sequence,acquired data,software testing,prototypes,debugging,hardware,hardware description language,data collection,data mining,silicon,data engineering,registers,vhdl,data analysis,functional verification,simulation,algorithm design and analysis | Functional verification,Computer science,Real-time computing,Software,Information engineering,VHDL,Time to market,ATML,Debugging,Hardware description language | Conference |
ISSN | Citations | PageRank |
1530-1591 | 18 | 0.78 |
References | Authors | |
16 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yu-Shen Yang | 1 | 92 | 8.23 |
| Nicola Nicolici | 2 | 807 | 59.91 |
| A. Veneris | 3 | 937 | 67.52 |