Paper Info
Title
A system-level methodology for fully compensating process variability impact of memory organizations in periodic applications
Abstract
Process variability is an emerging problem that is becoming worse with each new technology node. Its impact on the performance and energy of memory organizations is severe and degrades the system-level parametric yield. In this paper we propose a broadly applicable system-level technique that can guarantee parametric yield on the memory organization and which minimizes the energy overhead associated to variability in the conventional design process. It is based on offering configuration capabilities at the memory-level and exploiting them at the system-level. This technique can decrease by up to a factor of 5 the energy overhead that is introduced by state-of-the-art process variability compensation techniques, including statistical timing analysis. In this way we obtain results close to the ideal nominal design again.
Year
DOI
Venue
2005
10.1145/1084834.1084866
CODES+ISSS
Keywords
Field
DocType
system-level methodology,periodic application,conventional design process,parametric yield,compensating process variability impact,applicable system-level technique,memory organization,system-level parametric yield,state-of-the-art process variability compensation,energy overhead,configuration capability,process variability,ideal nominal design,control systems,robustness,degradation,process design,design process
Permission,Computer science,Real-time computing,Robustness (computer science),Process design,Parametric statistics,Control system,Design process,Memory organisation,Energy consumption
Conference
ISBN
Citations 
PageRank 
1-59593-161-9
14
0.82
References 
Authors
10
5
Name
Order
Citations
PageRank
A. Papanikolaou1342.95
F. Lobmaier2140.82
Hai Wang377495.30
M. Miranda414411.00
F. Catthoor589783.95