Title
Realistic Fault Analysis of CMOS Analog Building Blocks
Year
DOI
Venue
1993
10.1109/DFTVS.1993.595827
DFT
Keywords
Field
DocType
cmos analog building blocks,realistic fault analysis,functional test,functional testing,circuit analysis,integrated circuit,quality improvement,design for testability,cmos integrated circuits
Design for testing,Automatic test pattern generation,Fault analysis,Computer science,Test quality,CMOS,Electronic engineering,Parametric statistics,Network analysis,Integrated circuit,Reliability engineering
Conference
ISBN
Citations 
PageRank 
0-8186-3502-9
1
0.41
References 
Authors
8
6
Name
Order
Citations
PageRank
P. Nicolau110.41
J. Barbosa210.75
M. Saraiva3191.93
Marcelino B. Santos412920.76
Isabel Teixeira5596.03
João Paulo Teixeira614022.06