Paper Info
Title
A design procedure for oscillator-based hardware random number generator with stochastic behavior modeling
Abstract
This paper presents a procedure in designing an oscillator-based hardware random number generator (HRNG) which generates highly random bitstreams even under the deterministic noises. The procedure consists of two parts; HRNG design without considering deterministic noises followed by randomness evaluation under deterministic noises. A stochastic behavior model to efficiently decide the design parameters is proposed, and it is validated by measurement of HRNGs fabricated in 65nm CMOS process. The proposed model directly calculates approximate entropy of output without generating bitstream, which make it easier to explore design space. A simulator considering the power supply noise is also developed for evaluation under deterministic noises.
Year
DOI
Venue
2010
10.1007/978-3-642-17955-6_8
WISA
Keywords
Field
DocType
oscillator-based hardware,cmos process,random bitstreams,design procedure,design space,design parameter,stochastic behavior modeling,deterministic noise,stochastic behavior model,hrng design,random number generator,randomness evaluation,stochastic model,oscillations,behavior modeling
Stochastic simulation,Stochastic optimization,Computer science,Hardware random number generator,Theoretical computer science,Stochastic modelling,Deterministic system,Deterministic algorithm,Bitstream,Randomness
Conference
Volume
ISSN
ISBN
6513
0302-9743
3-642-17954-1
Citations 
PageRank 
References 
5
0.68
5
Authors
4
Name
Order
Citations
PageRank
Takehiko Amaki1233.28
Masanori Hashimoto246279.39
Yukio Mitsuyama313420.01
Takao Onoye432968.21