Name
Abstract | ||
|---|---|---|
Power delivery networks of VLSI chips require adequate input supply connections to ensure reliable performance. This paper addresses the problem of finding an optimum set of pads, pins, and on-chip voltage regulators, and their placement in a given power supply network, subject to constraints on the voltage drops in the network and maximum currents through the pads, pins and regulators. The problem is modeled as a mixed integer linear program using macromodeling techniques and several heuristic techniques are proposed to make the problem tractable. The effectiveness of the proposed techniques is demonstrated on several real chips and memories used in low-power and high-performance applications. |
Year | DOI | Venue |
|---|---|---|
2004 | 10.1145/996566.996615 | DAC |
Keywords | Field | DocType |
adequate input supply connection,vlsi chip,power supply pad,heuristic technique,voltage drop,on-chip voltage regulator,problem tractable,proposed technique,power supply network,optimal placement,power delivery network,high-performance application,very large scale integration,voltage,network on a chip,voltage regulator,power systems,chip,circuits | Supply network,Heuristic,Computer science,Voltage drop,Electric power system,Network on a chip,Electronic engineering,Linear programming,Electrical engineering,Very-large-scale integration,Voltage regulator | Conference |
ISSN | ISBN | Citations |
0738-100X | 1-58113-828-8 | 10 |
PageRank | References | Authors |
0.63 | 18 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Min Zhao | 1 | 246 | 24.38 |
| Yuhong Fu | 2 | 83 | 7.51 |
| Vladimir Zolotov | 3 | 1367 | 109.07 |
| Savithri Sundareswaran | 4 | 190 | 16.84 |
| R. Panda | 5 | 1002 | 111.69 |