Title
Enhanced Reusability for SoC-Based HW/SW Co-Design
Abstract
This paper addresses design methods for SoC-based HW/SW systems using reconfigurable architectures. The emphasis is the development of a method to enhance the reusability of HW and SW in the co-design process using proven languages like ANSI-C and VHDL. We distinguish between three abstraction layers for design modules consisting of both HW and SW. This approach benefits the reuse of HW sources as well as SW sources for differentapplications as well as on different devices. We utilize the reconfigurable SoC Atmel FPSLIC for experimental tests and obtain a significant reuse ratio.
Year
DOI
Venue
2002
10.1109/DSD.2002.1115356
DSD
Keywords
Field
DocType
paper addresses design method,approach benefit,soc-based hw,abstraction layer,significant reuse ratio,reconfigurable architecture,hw source,reconfigurable soc atmel fpslic,sw co-design,sw source,enhanced reusability,sw system,design process,testing,ansi c,design methodology,design method,hardware description languages,system on chip,global positioning system,field programmable gate arrays,vhdl,design methods
Co-design,Computer architecture,System on a chip,ANSI C,Reuse,Computer science,Field-programmable gate array,Real-time computing,VHDL,Reusability,Embedded system,Hardware description language
Conference
ISBN
Citations 
PageRank 
0-7695-1790-0
5
0.72
References 
Authors
0
4
Name
Order
Citations
PageRank
Maik Boden1193.33
Jörg Schneider2113.65
Klaus Feske3117.23
Steffen Rülke4527.40