Abstract | ||
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We propose using logic implications as a source of online diagnostic data for on-chip test set selection by taking advantage of their ability to automatically identify a restricted set of faults as the potential cause of an observed error. This information will be used to dynamically choose a test set to detect systematic latent defects or wear out in a multi core system. |
Year | DOI | Venue |
---|---|---|
2011 | 10.1109/ETS.2011.59 | European Test Symposium |
Keywords | Field | DocType |
potential cause,multi core system,on-chip test set selection,implication-based on-chip diagnosis,online diagnostic data,restricted set,systematic latent defect,observed error,dynamic test set selection,logic implication,multicore processing,system on a chip,systematics,hardware,dynamic testing,electrical engineering,system on chip,error detection,chip | System on a chip,Computer science,Real-time computing,Error detection and correction,Dynamic testing,Multi-core processor,Embedded system,Test set | Conference |
ISSN | ISBN | Citations |
1530-1877 E-ISBN : 978-0-7695-4433-5 | 978-0-7695-4433-5 | 2 |
PageRank | References | Authors |
0.37 | 20 | 6 |
Name | Order | Citations | PageRank |
---|---|---|---|
N. Alves | 1 | 6 | 0.78 |
Y. Shi | 2 | 2 | 0.37 |
N. Imbriglia | 3 | 2 | 0.37 |
Jennifer Dworak | 4 | 132 | 11.63 |
K. Nepal | 5 | 96 | 10.42 |
R. Iris Bahar | 6 | 878 | 84.31 |