Name
Abstract | ||
|---|---|---|
Shared memory multiprocessors play an increasingly important role in enterprise and scientific computing facilities. Remote misses limit the performance of shared memory applications, and their significance is growing as network latency increases relative to processor speeds. This paper proposes two mechanisms that improve shared memory performance by eliminating remote misses and/or reducing the amount of communication required to maintain coherence. We focus on improving the performance of applications that exhibit producer-consumer sharing. We first present a simple hardware mechanism for detecting producer-consumer sharing. We then describe a directory delegation mechanism whereby the "home node" of a cache line can be delegated to a producer node, thereby converting 3-hop coherence operations into 2-hop operations. We then extend the delegation mechanism to support speculative updates for data accessed in a producer-consumer pattern, which can convert 2-hop misses into local misses, thereby eliminating the remote memory latency. Both mechanisms can be implemented without changes to the processor. We evaluate our directory delegation and speculative update mechanisms on seven benchmark programs that exhibit producer-consumer sharing using a cycle-accurate execution-driven simulator of a future 16-node SGI multiprocessor. We find that the mechanisms proposed in this paper reduce the average remote miss rate by 40%, reduce network traffic by 15%, and improve performance by 21%. Finally, we use Murphi to verify that each mechanism is error-free and does not violate sequential consistency |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1109/HPCA.2007.346210 | HPCA |
Keywords | Field | DocType |
scientific computing facilities,shared memory multiprocessors,directory delegation mechanism,protocols,speculative update mechanisms,cache storage,benchmark programs,sgi multiprocessor,enterprise computing facilities,exhibit producer-consumer sharing,delegation mechanism,producer-consumer pattern,remote memory latency,shared memory systems,simple hardware mechanism,cycle-accurate execution-driven simulator,producer-consumer sharing,murphi,performance ofshared memory application,cache line,memory performance,adaptive cache coherence protocol,sequential consistency,shared memory,memory latency,scientific computing,data access | Uniform memory access,Computer science,Cache-only memory architecture,Computer network,Real-time computing,Distributed computing,Shared memory,Cache pollution,Parallel computing,Distributed memory,Bus sniffing,Distributed shared memory,Cache coherence | Conference |
ISSN | ISBN | Citations |
1530-0897 | 1-4244-0805-9 | 34 |
PageRank | References | Authors |
1.21 | 24 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Liqun Cheng | 1 | 49 | 2.96 |
| John B. Carter | 2 | 1785 | 162.82 |
| Donglai Dai | 3 | 109 | 7.90 |