IBM Bluemix Mobile Cloud Services. | 4 | 0.41 | 2016 |
AC/DC TCP: Virtual Congestion Control Enforcement for Datacenter Networks. | 35 | 1.28 | 2016 |
Presto: Edge-based Load Balancing for Fast Datacenter Networks | 46 | 1.56 | 2015 |
SDN traceroute: tracing SDN forwarding without changing network behavior | 31 | 1.29 | 2014 |
Practical DCB for improved data center networks | 6 | 0.48 | 2014 |
Planck: millisecond-scale monitoring and control for commodity networks | 54 | 1.70 | 2014 |
OpenSample: A Low-Latency, Sampling-Based Measurement Platform for Commodity SDN | 39 | 1.37 | 2014 |
Low-latency Network Monitoring via Oversubscribed Port Mirroring. | 2 | 0.36 | 2014 |
Shadow MACs: scalable label-switching for commodity ethernet | 11 | 0.67 | 2014 |
Active Guardband Management in Power7+ to Save Energy and Maintain Reliability | 27 | 1.04 | 2013 |
Active memory controller | 4 | 0.42 | 2012 |
PAST: scalable ethernet for data centers | 82 | 3.46 | 2012 |
Tiered Memory: An Iso-Power Memory Architecture to Address the Memory Power Wall | 5 | 0.43 | 2012 |
Reliability-aware energy management for hybrid storage systems | 7 | 0.44 | 2011 |
Temperature-Aware Architecture: Lessons and Opportunities | 5 | 0.46 | 2011 |
Active management of timing guardband to save energy in POWER7 | 45 | 1.86 | 2011 |
Architecting for power management: The IBM® POWER7™ approach | 30 | 1.68 | 2010 |
Power-performance management on an IBM POWER7 server | 13 | 0.77 | 2010 |
A look inside IBM's green data center research | 1 | 0.36 | 2009 |
Dynamic hardware-assisted software-controlled page placement to manage capacity allocation and sharing within large caches | 49 | 1.52 | 2009 |
Extending CC-NUMA systems to support write update optimizations | 5 | 0.43 | 2008 |
Active memory operations | 14 | 0.61 | 2007 |
An Adaptive Cache Coherence Protocol Optimized for Producer-Consumer Sharing | 34 | 1.21 | 2007 |
Program phase detection and exploitation | 7 | 0.54 | 2006 |
Efficient address remapping in distributed shared-memory systems | 1 | 0.34 | 2006 |
Leveraging Wire Properties at the Microarchitecture Level | 2 | 0.40 | 2006 |
Fast synchronization on shared-memory multiprocessors: An architectural approach | 3 | 0.37 | 2005 |
Fast Barriers for Scalable ccNUMA Systems | 5 | 0.56 | 2005 |
Rapid Prototyping of Embedded Software Using Selective Formalism | 2 | 0.48 | 2005 |
Flexible Consistency for Wide Area Peer Replication | 11 | 0.71 | 2005 |
Scalable barrier synchronisation for large-scale shared-memory multiprocessors | 0 | 0.34 | 2004 |
Highly efficient synchronization based on active memory operations | 5 | 0.50 | 2004 |
A Lightweight Secure Cyber Foraging Infrastructure for Resource-Constrained Devices | 56 | 4.49 | 2004 |
Proceedings of the 3rd Workshop on Memory Performance Issues, in conjunction with the 31st International Symposium on Computer Architecture 2004, Munich, Germany, June 20, 2004 | 18 | 1.80 | 2004 |
A Cost Model For Integrated Restructuring Optimizations | 2 | 0.37 | 2003 |
Restructuring computations for temporal data cache locality | 9 | 0.63 | 2003 |
A novel 32-bit scalable multiplier architecture | 2 | 0.44 | 2003 |
Computation regrouping: restructuring programs for temporal data cache locality | 8 | 0.51 | 2002 |
The Impulse Memory Controller | 64 | 3.15 | 2001 |
Reevaluating Online Superpage Promotion with Hardware Support | 18 | 0.97 | 2001 |
A Cost Framework for Evaluating Integrated Restructuring Optimizations | 5 | 0.51 | 2001 |
Online Superpage Promotion Revisited | 0 | 0.34 | 2000 |
Memory System Support for Dynamic Cache Line Assembly | 4 | 0.42 | 2000 |
Design of a Parallel Vector Access Unit for SDRAM Memory Systems | 33 | 2.43 | 2000 |
Algorithmic foundations for a parallel vector access memory system | 6 | 0.45 | 2000 |
MP-LOCKs: replacing H/W synchronization primitives with message passing | 6 | 0.53 | 1999 |
Memory system support for image processing | 9 | 0.78 | 1999 |
Impulse: Memory system support for scientific applications | 9 | 0.86 | 1999 |
Impulse: Building a Smarter Memory Controller | 126 | 7.78 | 1999 |
Design alternatives for shared memory multiprocessors | 2 | 0.37 | 1998 |