Name
Title | ||
|---|---|---|
On-chip measurement to analyze failure mechanisms of ICs under system level ESD stress. |
Abstract | ||
|---|---|---|
•System Level ESD.•On-chip measurements.•IC design. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1016/j.microrel.2013.07.056 | Microelectronics Reliability |
Field | DocType | Volume |
Oscilloscope,Electrostatic discharge,Waveform,CMOS,Electronic engineering,Electronic systems,Bandwidth (signal processing),Engineering,Electrical engineering,System level | Journal | 53 |
Issue | ISSN | Citations |
9 | 0026-2714 | 1 |
PageRank | References | Authors |
0.38 | 4 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Fabrice Caignet | 1 | 79 | 7.99 |
| Nicolas Nolhier | 2 | 4 | 2.28 |
| M. Bafleur | 3 | 1 | 0.38 |
| A. Wang | 4 | 1 | 0.38 |
| N. Mauran | 5 | 6 | 2.64 |