Title
Integration of medium-throughput signal processing algorithms on flexible instruction-set architectures
Abstract
Integrated circuits in telecommunications and consumer electronics are rapidly evolving towards single chip solutions. New IC architectures are emerging, which combine instruction-set processor cores with customised hardware. This paper describes a high-level synthesis system for integration of real-time signal processing systems on such processor cores. The compiler supports a flexible architectural model. It can handle certain types of incompletely specified architectures, and offers capabilities for retargetable compilation and architectural exploration. Results for a realistic application from the domain of audio processing indicate the feasibility and power of the presented approach.
Year
DOI
Venue
1995
10.1007/BF02406470
Journal of Signal Processing Systems
Keywords
Field
DocType
Medium Throughput,Design Script,Multiple Precision Arithmetic,Branch Logic,Datapath Architecture
Signal processing,Computer science,Instruction set,Real-time computing,Electronics,Throughput,Audio signal processing,Architectural model,Multi-core processor,Computer architecture,Parallel computing,Compiler,Embedded system
Journal
Volume
Issue
ISSN
9
1-2
0922-5773
Citations 
PageRank 
References 
13
6.95
26
Authors
10
Name
Order
Citations
PageRank
Gert Goossens129363.59
Dirk Lanneer219032.08
Marc Pauwels3289.66
Francis Depuydt42810.25
Koen Schoofs57819.03
Augusli Kifli67919.01
Marco Cornero78525.70
Paolo Petroni8136.95
Francky Catthoor93932423.30
Hugo De Man102177257.77