Paper Info
Title
A Flexible Interconnection Structure for Reconfigurable FPGA Dataflow Applications
Abstract
Dataflow applications have proven to be well-suited for hardware implementation due to their intrinsic pipelined nature. Furthermore a wide range of algorithms, ranging from image analysis to map-reduce tasks, can be expressed using this paradigm. At the same time Field Programmable Gate Arrays (FPGA) start to be employed as hardware accelerators also in high-end systems coupled with General Purpose Processors (GPP). In this work we propose a programmable interconnection structure which permits to dynamically reconfigure the functionality of an FPGA implementing dataflow applications. A detailed analysis of the proposed solution shows that it is effectively able to increase the overall system flexibility helping in reducing the overall workload execution up to 25%, while at the same time reducing its variance.
Year
DOI
Venue
2013
10.1109/IPDPSW.2013.127
Parallel and Distributed Processing Symposium Workshops & PhD Forum
Keywords
Field
DocType
detailed analysis,intrinsic pipelined nature,general purpose processors,overall workload execution,high-end system,time field programmable gate,overall system flexibility,flexible interconnection structure,dataflow application,hardware implementation,reconfigurable fpga dataflow applications,image analysis,switches,field programmable gate array,parallel algorithms,hardware accelerator,flexible electronics,fpga,pipelines,kernel,interconnection,field programmable gate arrays,data flow analysis,hardware
Computer architecture,Parallel algorithm,Computer science,Field-programmable gate array,Data-flow analysis,Flexible electronics,Dataflow,Ranging,Interconnection,Reconfigurable computing
Conference
ISBN
Citations 
PageRank 
978-0-7695-4979-8
0
0.34
References 
Authors
11
6
Name
Order
Citations
PageRank
Gianluca Durelli1307.13
Alessandro Antonio Nacci2729.48
Riccardo Cattaneo3579.14
Christian Pilato432932.19
D. Sciuto51720176.61
Marco D. Santambrogio677191.15