Title
Semi-Iterative Analog Turbo Decoding
Abstract
Based on multiple-slice turbo codes, a novel semi-iterative analog turbo decoding algorithm and its corresponding decoder architecture are presented. This work paves the way for integrating flexible analog decoders dealing with frame lengths over thousands of bits. The algorithm benefits from a partially continuous exchange of extrinsic information to improve decoding speed and correction performance. The proposed algorithm and architecture are applied to design an analog decoder for double-binary codes. Taking full advantage of multiple slice codes, the on-chip area is shown to be reduced by ten when compared to a conventional fully parallelized analog slice turbo decoder. The reconfigurable analog core area for frames of 40 bits up to 2432 bits is 37 mm(2) in a 0.25-mu m BiCMOS process.
Year
DOI
Venue
2006
10.1109/TCSI.2007.897770
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
Keywords
Field
DocType
analog decoding, multiple-slice turbo codes, turbo codes
BiCMOS,Reconfigurability,Computer science,Turbo code,Slicing,Chip,Electronic engineering,Digital Video Broadcasting,Decoding methods,Encoding (memory)
Conference
Volume
Issue
ISSN
54
6
1549-8328
Citations 
PageRank 
References 
5
0.52
0
Authors
5
Name
Order
Citations
PageRank
Matthieu Arzel16915.10
Cyril Lahuec2299.17
Fabrice Seguin33616.02
David Gnaedig4394.86
Michel Jezequel5313.07