Paper Info
Title
Thermal aware cell-based full-chip electromigration reliability analysis
Abstract
A hierarchical scheme with cells and modules is crucial for managing design complexity during a large integrated circuit design. We present a methodology for thermal aware cell-based electromigration analysis suitable for integrating electromigration reliability analysis into a conventional IC design flow. A block or cell is characterized for reliability while it is characterized for power and timing. Reusing cell characterization data significantly reduces computational load while analyzing a full-chip layout. During full-chip analysis, we compute a layout-level temperature profile from cell power dissipations using a Fast Fourier Transform based algorithm. The described full-chip reliability assessment methodology has been implemented in an interconnect reliability CAD tool. We have exercised the tool to demonstrate performance-reliability tradeoff and the significance of thermal-aware reliability analysis for true reliability aware design.
Year
DOI
Venue
2005
10.1145/1057661.1057670
ACM Great Lakes Symposium on VLSI
Keywords
Field
DocType
true reliability aware design,design complexity,thermal-aware reliability analysis,thermal aware cell-based full-chip,conventional ic design flow,reliability cad tool,large integrated circuit design,full-chip analysis,reusing cell characterization data,electromigration reliability analysis,full-chip reliability assessment methodology,chip,design flow,integrated circuit design,fast fourier transform,reliability analysis,thermal analysis,electromigration,power dissipation
Thermal,Reuse,Computer science,Real-time computing,Chip,Electronic engineering,Integrated circuit design,Fast Fourier transform,Reliability (semiconductor),Electromigration,Interconnection,Reliability engineering
Conference
ISBN
Citations 
PageRank 
1-59593-057-4
3
0.67
References 
Authors
5
3
Name
Order
Citations
PageRank
Syed M. Alam117620.47
Donald E. Troxel28738.38
Thompson, Carl V.35011.56