Paper Info
Title
Speedups and Energy Savings of Microprocessor Platforms with a Coarse-Grained Reconfigurable Data-Path
Abstract
Abstract This paper ,presents the performance ,improvements and,the ,energy ,reductions ,by coupling ,a high- performance,coarse-grained ,reconfigurable ,data-path with a microprocessor, in a generic ,platform. The data- path has been previously introduced by the authors. It is composed,by computational units able to realize complex operations which ,aid in improving ,the performance ,of time critical application parts, called kernels. A design flow,is proposed ,for mapping ,high-level software descriptions to the microprocessor,system. Eight real-life applications are mapped ,on three ,different instances of the system. Significant overall application speedups, relative to a software-only solution, ranging from 1.74 to 3.94 are reported being close to theoretical ,speedup bounds. Average energy savings of 59% are achieved, while the reduction in the ,system energy-delay product ranges from 66% to 92%.
Year
DOI
Venue
2007
10.1109/IPDPS.2007.370383
IPDPS
Keywords
Field
DocType
hardware,application software,logic design,parallel processing,design flow,field programmable gate arrays,kernel
Logic synthesis,Datapath,Computer science,Microprocessor,Parallel computing,Field-programmable gate array,Design flow,Application software,Energy consumption,Speedup
Conference
Citations 
PageRank 
References 
0
0.34
16
Authors
3
Name
Order
Citations
PageRank
Michalis D. Galanis19415.60
Grigoris Dimitroulakos2267.85
Costas E Goutis318625.76