Name
Abstract | ||
|---|---|---|
Many emerging and future applications require significant levels of complex digital signal processing and operate within limited power budgets. Moreover, dramatically rising VLSI fabrication and design costs make programmable and reconfigurable solutions increasingly attractive. The AsAP project addresses these challenges with a chip multiprocessor composed of simple processors with small memories, achieving high energy efficiency and throughput in a small chip area. |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1109/MM.2007.29 | IEEE Micro |
Keywords | Field | DocType |
embedded system,chip,vlsi design,digital signal processing,microarchitecture,embedded systems,vlsi,integrated circuit design | Digital signal processing,Computer architecture,Computer science,Parallel computing,Vlsi fabrication,Chip,Multiprocessing,Integrated circuit design,Throughput,Very-large-scale integration,Embedded system,Microarchitecture | Journal |
Volume | Issue | ISSN |
27 | 2 | 0272-1732 |
Citations | PageRank | References |
14 | 0.88 | 12 |
Authors | ||
11 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Bevan M. Baas | 1 | 295 | 27.78 |
| Zhiyi Yu | 2 | 158 | 18.40 |
| Michael J. Meeuwsen | 3 | 93 | 7.70 |
| Omar Sattari | 4 | 63 | 6.15 |
| Ryan W. Apperson | 5 | 91 | 7.34 |
| Eric W. Work | 6 | 63 | 6.15 |
| Jeremy W. Webb | 7 | 63 | 6.15 |
| Michael Lai | 8 | 48 | 7.81 |
| Tinoosh Mohsenin | 9 | 406 | 47.43 |
| Dean Truong | 10 | 34 | 2.48 |
| Jason Cheung | 11 | 14 | 0.88 |