Paper Info
Title
Binary acceleration using coarse-grained reconfigurable architecture
Abstract
Coarse-grained reconfigurable architectures (CGRAs) have been well-researched and shown to be particularly effective in acceleration of data-intensive applications. However, practical difficulties in application mapping have hindered their widespread adoption. Typically, an application must be modified manually or by using special compilers and design tools in order to fully exploit the architecture. This incurs considerable design costs to the application developer and reduces software portability. In this paper, we propose a framework for automatic transformation of an application at binary-level, with which the user can execute an arbitrary application on the CGRA. Our approach analyzes the binary code and determines which portions of the program to accelerate, maps them to the reconfigurable array, then modifies the binary code appropriately to run on the CGRA. We describe the overall process of our framework, and present solutions to several problems that arise from such an approach. Results from our preliminary experiments show that we are able to achieve speedup of up to 14.8.
Year
DOI
Venue
2010
10.1145/1926367.1926374
SIGARCH Computer Architecture News
Keywords
Field
DocType
application developer,high-level synthesis,binary code,data-intensive application,binary acceleration,automatic transformation,incurs considerable design cost,arbitrary application,system-on-chip,application mapping,reconfigurable array,design tool,coarse-grained reconfigurable architecture,application development,system on chip,real time systems,high level synthesis
System on a chip,Computer science,High-level synthesis,Binary code,Parallel computing,Compiler,Exploit,Real-time computing,Software portability,Speedup,Binary number
Journal
Volume
Issue
Citations 
38
4
8
PageRank 
References 
Authors
0.62
13
3
Name
Order
Citations
PageRank
Jong Kyung Paek1191.25
Kiyoung Choi21866171.98
Jongeun Lee342933.71