Name
Abstract | ||
|---|---|---|
As FPGAs are increasingly used in military applications, the security of a design when the part is powered off is an important property that needs to be analyzed. In this paper, we study data remanence in modern FPGAs using a custom 90nm FPGA designed for this test. The effects of temperatures, architecture, memory topology, and power off methods are analyzed. We find that different memory cells in the FPGA architecture have different remanence properties depending on their circuit design, data content, leakage and supply noise. To our knowledge, this is the first study of data remanence in FPGAs and in deep-submicron ICs. |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1109/CICC.2007.4405689 | PROCEEDINGS OF THE IEEE 2007 CUSTOM INTEGRATED CIRCUITS CONFERENCE |
Keywords | Field | DocType |
circuit design,field programmable gate arrays,logic design | Logic synthesis,Remanence,Leakage (electronics),Data analysis,Computer science,Circuit design,Field-programmable gate array,Electronic engineering,Data remanence,Embedded system,Reconfigurable computing | Conference |
Citations | PageRank | References |
6 | 0.67 | 1 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| T. Tuan | 1 | 425 | 53.13 |
| Tom Strader | 2 | 6 | 0.67 |
| Steve Trimberger | 3 | 241 | 23.14 |