Name
Title | ||
|---|---|---|
A 1.6V 3.3Gb/s GDDR3 DRAM with dual-mode phase- and delay-locked loop using power-noise management with unregulated power supply in 54nm CMOS. |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1109/ISSCC.2009.4977347 | ISSCC |
Keywords | Field | DocType |
noise,delay locked loop,jitter,charge pump circuit,phase locked loops,delay lock loop,cmos,cmos integrated circuits,charge pump,gain,pll | Dram,Phase-locked loop,Computer science,Delay-locked loop,Voltage,CMOS,Voltage-controlled oscillator,Electronic engineering,Charge pump,Jitter,Electrical engineering | Conference |
Citations | PageRank | References |
1 | 0.40 | 4 |
Authors | ||
24 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hyun-Woo Lee | 1 | 162 | 43.02 |
| Won-Joo Yun | 2 | 53 | 8.30 |
| Young-Kyoung Choi | 3 | 17 | 2.73 |
| Hyang-Hwa Choi | 4 | 10 | 1.34 |
| Jong-Jin Lee | 5 | 1 | 0.40 |
| Kihan Kim | 6 | 18 | 2.95 |
| Shin-Deok Kang | 7 | 25 | 3.90 |
| Ji-Yeon Yang | 8 | 10 | 1.34 |
| Jae-Suck Kang | 9 | 1 | 0.40 |
| Hyeng-Ouk Lee | 10 | 10 | 1.34 |
| Dong-Uk Lee | 11 | 23 | 2.68 |
| Su-jeong Sim | 12 | 11 | 1.71 |
| Young-Ju Kim | 13 | 268 | 29.56 |
| Won Jun Choi | 14 | 14 | 3.58 |
| Keun-Soo Song | 15 | 20 | 3.14 |
| Sang-Hoon Shin | 16 | 15 | 1.99 |
| Hyung-Wook Moon | 17 | 10 | 1.34 |
| Seung-Wook Kwack | 18 | 18 | 2.78 |
| Jung Woo Lee | 19 | 131 | 13.74 |
| Nak-Kyu Park | 20 | 17 | 2.73 |
| Kwan-Weon Kim | 21 | 44 | 6.51 |
| Young-Jung Choi | 22 | 63 | 9.75 |
| Jin-Hong Ahn | 23 | 15 | 2.85 |
| Byongtae Chung | 24 | 76 | 7.44 |