Name
Abstract | ||
|---|---|---|
The Amalgam programmable-reconfigurable processor is designed to provide the computational power required by upcoming embedded applications without requiring the design of application-specific hardware. programmable processors and blocks of reconfigurable logic onto a single chip, using a clustered architecture, similar to the one used on the M-Machine [1] to reduce wire length and delay and allow implementation at high clock rates. The clustered architecture provides tremendous flexibility, allowing applications to exploit parallelism at whatever granularity is best-suited to the application, while the combination of reconfigurable logic and programmable processors delivers much higher performance than could be achieved through programmable processors alone. |
Year | DOI | Venue |
|---|---|---|
2002 | 10.1109/FPGA.2002.1106697 | FCCM |
Keywords | Field | DocType |
mapping algorithms,amalgam programmable-reconfigurable processor,parallel processing,chip,embedded computing,computer architecture,process design,hardware,amalgam,performance,clustering algorithms | Computer science,Advanced Encryption Standard,Parallel computing,Encryption,Chip,Ranging,Process design,Dither,Granularity,Cluster analysis,Embedded system | Conference |
ISBN | Citations | PageRank |
0-7695-1801-X | 0 | 0.34 |
References | Authors | |
4 | 6 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jeffrey J. Cook | 1 | 110 | 7.45 |
| Derek B. Gottlieb | 2 | 9 | 2.73 |
| Joshua D. Walstrom | 3 | 3 | 0.89 |
| Steven Ferrera | 4 | 0 | 0.34 |
| Chi-Wei Wang | 5 | 26 | 4.37 |
| Nicholas P. Carter | 6 | 349 | 33.84 |