Name
Abstract | ||
|---|---|---|
As CMOS technology scales down into the deep-submicron domain, the aspects of fault tolerance in complex Networks-on-Chip (NoCs) architectures are assuming an increasing relevance. Task remapping is a software based solution for dealing with permanent failures in processing elements in the NoC. In this work, we formulate the optimal task mapping problem for mesh-based NoC multiprocessors with deterministic routing as an integer linear programming (ILP) problem with the objective of minimizing the communication traffic in the system and the total execution time of the application. We find the optimal mappings at design time for all scenarios where single-faults occur in the processing nodes. We propose heuristics for the online task remapping problem and compare their performance with the optimal solutions. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1145/1999946.1999967 | NOCS |
Keywords | Field | DocType |
optimal task mapping problem,fault-tolerant network-on-chip multiprocessors,task remapping,optimal solution,online task,processing node,total execution time,design time,optimal mapping,cmos technology scale,mesh-based noc multiprocessors,fault tolerant,network on chip,optimization,routing,fault tolerance,cmos integrated circuits,digital signal processing,cmos technology,chip,linear programming,reduced instruction set computing,kahn process networks,integer programming,integer linear programming,mathematical model,computer architecture,network routing | Deterministic routing,Computer science,Parallel computing,Network on a chip,Real-time computing,Software,Fault tolerance,Integer programming,Heuristics,Linear programming,Kahn process networks | Conference |
Citations | PageRank | References |
35 | 1.10 | 22 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Onur Derin | 1 | 89 | 6.24 |
| Deniz Kabakci | 2 | 35 | 1.10 |
| Leandro Fiorin | 3 | 229 | 17.10 |