Name
Abstract | ||
|---|---|---|
This paper presents a new fully reconfigurable 2D convolver designed for FPGA-based image and video processors. The proposed architecture operates on image pixels coded with different bit resolutions and varying kernel weights avoiding power and time-consuming reconfiguration. This is made possible by using new SIMD arithmetic modules purposely designed for the new circuit. When optimized for the XILINX VIRTEX device family, the convolver presented in this work requires just 18.4ms to perform a 5×5 convolution on a 1024×1024 8-bit pixels image and dissipates only 102.1mW/MHz. |
Year | DOI | Venue |
|---|---|---|
2005 | 10.1016/j.micpro.2004.10.004 | Microprocessors and Microsystems |
Keywords | Field | DocType |
Image processing,Convolution,Single instruction multiple data circuits | Kernel (linear algebra),Computer science,Convolution,Parallel computing,Image processing,Field-programmable gate array,SIMD,Virtex,Pixel,Computer hardware,Control reconfiguration | Journal |
Volume | Issue | ISSN |
29 | 8 | 0141-9331 |
Citations | PageRank | References |
17 | 1.24 | 2 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Stefania Perri | 1 | 264 | 33.11 |
| Marco Lanuzza | 2 | 203 | 28.64 |
| Pasquale Corsonello | 3 | 278 | 38.06 |
| Giuseppe Cocorullo | 4 | 106 | 17.00 |