Abstract | ||
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SystemC is a widespread language for developing SoC designs. Unfortunately, most SystemC simulators are based on a strictly sequential scheduler that heavily limits their performance, impacting verification schedules and time-to-market of new designs. Parallelizing SystemC simulation entails a complete re-design of the simulator kernel for the specific target parallel architectures. This paper proposes an automatic methodology to generate a parallel SystemC simulator kernel, exploiting the massive parallelism of GP-GPU architectures. Our solution leverages static scheduling to reduce synchronization overheads. The generated simulator code targets both CUDA and OpenCL libraries, to boost scalability and provide support for multiple GP-GPU architectures. Finally, the paper compares the performance of our solution on CUDA vs. OpenCL platforms, with the goal of investigating advantages and drawbacks that the two thread management libraries offer to concurrent SystemC simulation. |
Year | DOI | Venue |
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2012 | 10.1145/2380445.2380500 | CODES+ISSS |
Keywords | Field | DocType |
simulator code,specific target parallel architecture,simulator kernel,gp-gpu architecture,systemc simulator,concurrent systemc simulation,multiple gp-gpu architecture,parallelizing systemc simulation,opencl library,parallel systemc simulator kernel | Kernel (linear algebra),Synchronization,Massively parallel,CUDA,Scheduling (computing),Computer science,Parallel computing,SystemC,Schedule,Scalability | Conference |
Citations | PageRank | References |
5 | 0.45 | 12 |
Authors | ||
4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Nicola Bombieri | 1 | 318 | 38.74 |
Sara Vinco | 2 | 87 | 12.05 |
Valeria Bertacco | 3 | 1365 | 86.93 |
Debapriya Chatterjee | 4 | 115 | 7.87 |