Name
Abstract | ||
|---|---|---|
We have presented VEGA2: a Genetic Algorithm-based approach to the problem of equivalence verification of sequential circuits. Although sacrificing the exactness of the verification, the advantages of such an approach lie in the ability to handle large designs and in the possibility to easily trade off CPU time with confidence on the result (by tuning the maximum number of generations). VEGA2 is not a replacement for exact verification tools, but a complement: when the complexity of the circuits prevents the use of a BDD-based algorithm, it is still able to provide meaningful results. We also presented a prototypical tool and experimental analysis that shows that VEGA2 is able to provide a larger number of correct results than both an exact method and the previous GA-based approach. Thus it is able increase confidence on the validity of an optimization process. |
Year | DOI | Venue |
|---|---|---|
1999 | 10.1145/307418.307431 | Munich, Germany |
Keywords | Field | DocType |
approximate equivalence verification,sequential circuit,genetic algorithm,experimental analysis,circuit analysis,genetic algorithms,design optimization,central processing unit,electronic circuits,logic circuits,design flow,formal verification,prototypes,cpu time,sequential circuits | Central processing unit,Logic gate,Sequential logic,CPU time,Computer science,Algorithm,Theoretical computer science,Real-time computing,Equivalence (measure theory),Network analysis,Genetic algorithm,Formal verification | Conference |
ISBN | Citations | PageRank |
1-58113-121-6 | 2 | 0.41 |
References | Authors | |
2 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| F. Corno | 1 | 602 | 55.65 |
| M. Sonza Reorda | 2 | 1099 | 114.76 |
| G. Squillero | 3 | 330 | 30.36 |