Abstract | ||
---|---|---|
Networks-on-chip (NoCs) are key components in many-core chip designs. Dynamic power-awareness is a new challenge present in NoCs that must be efficiently handled by the routing functionality as it introduces irregularities in the commonly used 2-D meshes. In this article, we propose a logic-based routing algorithm, iFDOR, oriented towards dynamic powering down one region within every application partition on the chip through dynamic rerouting, with low implementation costs. Results show that we can successfully shutdown an arbitrary rectangular region within an application partition without significant impact on network performance. |
Year | DOI | Venue |
---|---|---|
2013 | 10.1145/2485984.2485999 | ACM Trans. Embedded Comput. Syst. |
Keywords | Field | DocType |
arbitrary rectangular region,dynamic powering,2-d mesh,routing functionality,low implementation cost,logic-based routing algorithm,many-core chip design,enabling power efficiency,dynamic power-awareness,application partition,key component | Electrical efficiency,Power management,Polygon mesh,Computer science,Static routing,Parallel computing,Chip,Real-time computing,Partition (number theory),Routing algorithm,Network performance | Journal |
Volume | Issue | ISSN |
12 | 4 | 1539-9087 |
Citations | PageRank | References |
0 | 0.34 | 41 |
Authors | ||
6 |
Name | Order | Citations | PageRank |
---|---|---|---|
Frank Olaf Sem-Jacobsen | 1 | 66 | 7.64 |
Samuel Rodrigo | 2 | 5 | 1.83 |
Alessandro Strano | 3 | 64 | 6.67 |
Tor Skeie | 4 | 1103 | 74.67 |
Davide Bertozzi | 5 | 1653 | 99.83 |
Francisco Gilabert | 6 | 133 | 7.02 |