Paper Info
Title
A design approach for radiation-hard digital electronics
Abstract
In this paper, we present a novel circuit design approach for radiation hardened digital electronics. Our approach is based on the use of shadow gates, whose task it is to protect the primary gate in case it is struck by a heavy cosmic ion. We locally duplicate the gate to be protected, and connect a pair of transistors (or diodes) between the outputs of the original and shadow gates. These transistors turn on when the voltages of the two gates deviate during a radiation strike. Our experiments show that at the level of a single gate, our circuit structure has a delay overhead of about 4% on average, and an area overhead of over 100%. At the circuit level, however, we do not need to protect all gates. We present a methodology to selectively protect specific gates of the circuit in a manner that guarantees radiation tolerance for the entire circuit. With this methodology, we demonstrate that at the circuit level, the delay overhead is about 4% and the placed-and-routed area overhead is 30%, compared to an unprotected circuit (for delay mapped designs).
Year
DOI
Venue
2006
10.1145/1146909.1147105
DAC
Keywords
Field
DocType
circuit level,shadow gate,circuit structure,radiation-hard digital electronics,gates deviate,unprotected circuit,entire circuit,delay overhead,placed-and-routed area overhead,area overhead,novel circuit design approach,circuit design,reliability,radiation hardening,logic gates,logic design,design,radiation hardness,testing,place and route
Logic synthesis,Delay calculation,Digital electronics,Logic gate,Computer science,Circuit reliability,Circuit extraction,Circuit design,Real-time computing,Electronic engineering,NOR logic,Electrical engineering
Conference
ISSN
ISBN
Citations 
0738-100X
1-59593-381-6
33
PageRank 
References 
Authors
2.33
3
4
Name
Order
Citations
PageRank
Rajesh Garg1768.45
Nikhil Jayakumar221520.42
Sunil P. Khatri31213137.09
Gwan Choi436956.66