Title | ||
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0.16-0.25 pJ/bit, 8 Gb/s Near-Threshold Serial Link Receiver With Super-Harmonic Injection-Locking. |
Abstract | ||
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A near-threshold forwarded-clock I/O receiver architecture is presented. In the proposed receiver, the majority of the circuitry is designed to operate in the near-threshold region at 0.6 V supply to save power, with the exception of only the global clock buffer, test buffers and synthesized digital circuits at the nominal 1 V supply. To ensure the quantizers are working properly with this low sup... |
Year | DOI | Venue |
---|---|---|
2012 | 10.1109/JSSC.2012.2196312 | IEEE Journal of Solid-State Circuits |
Keywords | Field | DocType |
Clocks,Receivers,Jitter,Phase noise,Bandwidth,Voltage-controlled oscillators | Ring oscillator,Computer science,Injection locking,Communication channel,Phase noise,Electronic engineering,CMOS,Low voltage,Jitter,Multiplexing | Journal |
Volume | Issue | ISSN |
47 | 8 | 0018-9200 |
Citations | PageRank | References |
6 | 0.68 | 0 |
Authors | ||
7 |
Name | Order | Citations | PageRank |
---|---|---|---|
Kangmin Hu | 1 | 68 | 7.51 |
Rui Bai | 2 | 13 | 4.00 |
Tao Jiang | 3 | 6 | 0.68 |
Chao Ma | 4 | 19 | 1.83 |
Ahmed Ragab | 5 | 12 | 1.59 |
Samuel Palermo | 6 | 46 | 7.88 |
Patrick Yin Chiang | 7 | 150 | 19.20 |