Paper Info
Title
Secure information flow analysis for hardware design: using the right abstraction for the job
Abstract
Hardware designers need to precisely analyze high-level descriptions for illegal information flows. Language-based information flow analyses can be applied to hardware description languages, but a straight-forward application either conservatively rules out many secure hardware designs, or constrains the designers to work at impractically low levels of abstraction. We demonstrate that choosing the right level of abstraction for the analysis, by working on Finite State Machines instead of the hardware code, allows both precise information flow analysis and high-level programmability.
Year
DOI
Venue
2010
10.1145/1814217.1814225
PLAS
Keywords
Field
DocType
hardware description language,right abstraction,high-level programmability,high-level description,language-based information flow analysis,hardware designer,illegal information flow,finite state machines,secure hardware design,hardware code,precise information flow analysis,secure information flow analysis,finite state machine,information flow,hardware security
Computer security compromised by hardware failure,Hardware security module,Hardware compatibility list,Intelligent verification,Computer science,Automated information system,Finite-state machine,Computer hardware,Hardware architecture,Hardware description language
Conference
Citations 
PageRank 
References 
4
0.42
20
Authors
5
Name
Order
Citations
PageRank
Xun Li11275.94
Mohit Tiwari244523.94
Ben Hardekopf344422.12
Timothy Sherwood41921123.28
Frederic T. Chong51428130.07