Power-based Attacks on Spatial DNN Accelerators | 0 | 0.34 | 2022 |
Horizontal Side-Channel Vulnerabilities of Post-Quantum Key Exchange and Encapsulation Protocols | 1 | 0.35 | 2021 |
Morpheus II: A RISC-V Security Extension for Protecting Vulnerable Software and Hardware | 0 | 0.34 | 2021 |
ACHyb: a hybrid analysis approach to detect kernel access control vulnerabilities | 0 | 0.34 | 2021 |
Morpheus II: A RISC-V Security Extension for Protecting Vulnerable Software and Hardware | 0 | 0.34 | 2021 |
ρ: Relaxed Hierarchical ORAM | 2 | 0.37 | 2019 |
Morpheus: A Vulnerability-Tolerant Secure Architecture Based on Ensembles of Moving Target Defenses with Churn | 3 | 0.39 | 2019 |
Cyclone: Detecting Contention-Based Cache Information Leaks Through Cyclic Interference | 2 | 0.36 | 2019 |
Horizontal side-channel vulnerabilities of post-quantum key exchange protocols | 2 | 0.40 | 2018 |
The Shape of Alerts: Detecting Malware Using Distributed Detectors by Robustly Amplifying Transient Correlations. | 0 | 0.34 | 2018 |
Binary Ring-LWE hardware with power side-channel countermeasures. | 0 | 0.34 | 2018 |
Power to peep-all: Inference Attacks by Malicious Batteries on Mobile Devices. | 3 | 0.36 | 2018 |
Exploiting Latent Attack Semantics for Intelligent Malware Detection. | 0 | 0.34 | 2017 |
EMMA: A New Platform to Evaluate Hardware-based Mobile Malware Analyses. | 1 | 0.35 | 2016 |
On Architectural Support for Systems Security. | 0 | 0.34 | 2016 |
Secure, Precise, And Fast Floating-Point Operations On X86 Processors | 3 | 0.37 | 2016 |
Invited - Who is the major threat to tomorrow's security?: you, the hardware designer | 3 | 0.37 | 2016 |
Quantifying and improving the efficiency of hardware-based mobile malware detectors. | 3 | 0.36 | 2016 |
GhostRider: A Hardware-Software System for Memory Trace Oblivious Computation | 45 | 1.21 | 2015 |
Raccoon: closing digital side-channels through obfuscated execution | 37 | 0.91 | 2015 |
Understanding contention-based channels and using them for defense | 28 | 0.79 | 2015 |
Sapper: a language for hardware-level security policy enforcement | 33 | 0.99 | 2014 |
Morpheus: benchmarking computational diversity in mobile malware | 5 | 0.45 | 2014 |
Gate-Level Information Flow Tracking for Security Lattices | 5 | 0.45 | 2014 |
Position paper: Sapper -- a language for provable hardware policy enforcement | 1 | 0.36 | 2013 |
PHANTOM: practical oblivious computation in a secure processor | 79 | 1.93 | 2013 |
Dataflow Tomography: Information Flow Tracking For Understanding and Visualizing Full Systems | 2 | 0.38 | 2012 |
Opportunities and Challenges of Using Plasmonic Components in Nanophotonic Architectures | 5 | 0.52 | 2012 |
Language without words: A pointillist model for natural language processing | 0 | 0.34 | 2012 |
Context-centric security | 2 | 0.39 | 2012 |
On the Complexity of Generating Gate Level Information Flow Tracking Logic | 9 | 0.53 | 2012 |
Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security | 51 | 1.71 | 2011 |
Caisson: a hardware description language for secure information flow | 38 | 1.09 | 2011 |
Information flow isolation in I2C and USB | 15 | 0.72 | 2011 |
Fighting fire with fire: modeling the datacenter-scale effects of targeted superlattice thermal management | 12 | 0.68 | 2011 |
Function flattening for lease-based, information-leak-free systems | 0 | 0.34 | 2010 |
Theoretical analysis of gate level information flow tracking | 12 | 0.74 | 2010 |
Secure information flow analysis for hardware design: using the right abstraction for the job | 4 | 0.42 | 2010 |
Hardware assistance for trustworthy systems through 3-D integration | 8 | 0.58 | 2010 |
Hardware trust implications of 3-D integration | 4 | 0.50 | 2010 |
Gate-Level Information-Flow Tracking for Secure Architectures | 6 | 0.55 | 2010 |
Execution leases: a hardware-supported mechanism for enforcing strong non-interference | 21 | 1.00 | 2009 |