Title
Scalable Verification of a Generic End-Around-Carry Adder for Floating-Point Units by Coq
Abstract
Theorem proving has been demonstrated as a powerful technique for datapath verification. This paper considers a generic logic-level architecture of end-around-carry adder, which is extensively used in floating-point arithmetic. The architecture is component-based and parameterized for easy customization. The design architecture is formalized and verified in the mechanical theorem prover Coq. The scalable proof provides necessary underpinnings for verifying customized and new implementations.
Year
DOI
Venue
2015
10.1109/TCAD.2014.2363391
IEEE Trans. on CAD of Integrated Circuits and Systems
Keywords
DocType
Volume
adders,Architecture,floating-point unit,Coq,end-around-carry adder,coq floating point units,verification,architecture,End-around-carry adder,end-around-carry adder (EAC),scalable verification,theorem proving,datapath verification,floating-point unit (fpu),logic level architecture,end-around-carry adder (eac),portable,Coq floating point units,floating-point unit (FPU),coq,generic end around carry adder,floating point arithmetic,logic testing
Journal
34
Issue
ISSN
Citations 
1
0278-0070
0
PageRank 
References 
Authors
0.34
10
5
Name
Order
Citations
PageRank
Qian Wang100.34
Xiaoyu Song247151.61
William N. N. Hung330434.98
Ming Gu455474.82
Jia-guang Sun51807134.30