Name
Title | ||
|---|---|---|
17.6 1V 10Gb/s/pin single-ended transceiver with controllable active-inductor-based driver and adaptively calibrated cascade-DFE for post-LPDDR4 interfaces |
Abstract | ||
|---|---|---|
Performance improvements in mobile devices with multi-cores and enhanced graphics quality requires higher memory bandwidth. Consequently, the design of I/O becomes a crucial issue [1]. In the LPDDR interface, a ground-terminated interface is used for a low-noise termination voltage (Vss) and small I/O capacitance (CIO) [2,3]. Even through noise margins and power efficiency are enhanced by ground termination, to compensate channel loss, the I/O is still the most power-hungry block. The pre-emphasized output driver and DFE are widely used to remove ISI and maximize read/write margins. However, multiple-taps in the output driver and the DFE are required to cover the channel loss, and they degrade the power efficiency of the I/O and occupy a large area. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/ISSCC.2015.7063055 | ISSCC |
Keywords | DocType | Citations |
adaptively calibrated cascade-dfe,transceivers,calibration,driver circuits,single-ended transceiver,pre-emphasized output driver,channel loss,dram chips,controllable active-inductor-based driver,voltage 1 v,enhanced graphics quality,iir filters,low-noise termination voltage,ground-terminated interface,inductors,boosting | Conference | 5 |
PageRank | References | Authors |
0.57 | 5 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Junyoung Song | 1 | 40 | 11.42 |
| Hyun-Woo Lee | 2 | 162 | 43.02 |
| Ja-young Kim | 3 | 56 | 10.72 |
| Sewook Hwang | 4 | 41 | 10.43 |
| Chulwoo Kim | 5 | 397 | 74.58 |