Title
On the development of high-throughput and area-efficient multi-mode cryptographic hash designs in FPGAs.
Abstract
In this paper, area-efficient and high-throughput multi-mode architectures for the SHA-1 and SHA-2 hash families are proposed and implemented in several FPGA technologies. Additionally a systematic flow for designing multi-mode architectures (implementing more than one function) of these families is introduced. Compared to the corresponding architectures that are produced by a commercial synthesis tool, the proposed ones are better in terms of both area (at least 40%) and throughput/area (from 32% up to 175%). Finally, the proposed architectures outperform similar existing ones in terms of throughput and throughput/area, from 4.2× up to 279.4× and from 1.2× up to 5.5×, respectively.
Year
DOI
Venue
2014
10.1016/j.vlsi.2014.02.004
Integration
Keywords
Field
DocType
Hash,Authentication,Multi-mode,FPGA
Authentication,Computer science,Parallel computing,Cryptographic hash function,Field-programmable gate array,Real-time computing,Hash function,Throughput
Journal
Volume
Issue
ISSN
47
4
0167-9260
Citations 
PageRank 
References 
2
0.37
12
Authors
4
Name
Order
Citations
PageRank
harris e michail115618.29
Georgios Athanasiou220.37
George Theodoridis3143.12
Costas E Goutis418625.76