Name
Abstract | ||
|---|---|---|
Negative Bias Temperature Instability (NBTI) is one of the serious concerns for long-term circuit performance degradation. NBTI degrades PMOS transistors under negative bias, whereas they recover once negative bias is removed. In this paper, we propose a mitigation method for NBTI-induced performance degradation that exploits the recovery property by shifting random input sequence through scan paths. With this method, we prevent consecutive stress that causes large degradation. Experimental results reveal that random scan-in vectors successfully mitigate NBTI and the path delay degradation is reduced by 71% in a test case when standby mode occupies 10% of total time. We also confirmed that 8-bit LFSR is capable of random number generation for this purpose with low area and power overhead. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1587/transfun.E97.A.1483 | IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES |
Keywords | Field | DocType |
NBTI, NBTI mitigation, performance degradation, scan path, aging, reliability | Standby power,Path delay,Electronic engineering,Real-time computing,Degradation (geology),Theoretical computer science,Negative-bias temperature instability,Circuit performance,Random number generation,Transistor,PMOS logic,Mathematics | Journal |
Volume | Issue | ISSN |
E97A | 7 | 1745-1337 |
Citations | PageRank | References |
0 | 0.34 | 8 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hiroaki Konoura | 1 | 36 | 5.00 |
| Toshihiro Kameda | 2 | 3 | 1.62 |
| Yukio Mitsuyama | 3 | 134 | 20.01 |
| Masanori Hashimoto | 4 | 462 | 79.39 |
| Takao Onoye | 5 | 329 | 68.21 |