Name
Title | ||
|---|---|---|
A Compact Low-Power Nonvolatile Flip-Flop Using Domain-Wall-Motion-Device-Based Single-Ended Structure |
Abstract | ||
|---|---|---|
A nonvolatile flip-flop (NV-FF) is proposed for a zero-standby-power LSI using a domain-wall motion (DWM) device. Since the write current path is separated from the read current path in the DWM device, two nonvolatile memory function blocks, a write driver for storing temporal data into the DWM device, and a sense amplifier for recalling the stored data from the DWM device can be optimized independently. Moreover, the use of a nonvolatile storage cell with a DWM-device-based single-ended structure makes it possible to implement both of these functions as two CMOS inverters, which makes it possible to merge them into a CMOS delay flip-flop (D-FF) core. Since the nonvolatile storage cell is electrically separated from the D-FF core during the normal operation, there is no performance degradation. In fact, the area and the power-delay product of the proposed NV-FF are minimized compared to those of the previous works. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1587/elex.11.20140296 | IEICE ELECTRONICS EXPRESS |
Keywords | Field | DocType |
nonvolatile logic, magnetic tunnel junction, spintronics | Computer science,Spintronics,Electronic engineering,Tunnel magnetoresistance,Flip-flop,Domain wall (magnetism),Electrical engineering | Journal |
Volume | Issue | ISSN |
11 | 13 | 1349-2543 |
Citations | PageRank | References |
0 | 0.34 | 2 |
Authors | ||
8 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Daisuke Suzuki | 1 | 47 | 7.32 |
| Noboru Sakimura | 2 | 116 | 22.07 |
| Masanori Natsui | 3 | 80 | 15.10 |
| Akira Mochizuki | 4 | 34 | 4.24 |
| Tadahiko Sugibayashi | 5 | 127 | 28.40 |
| Tetsuo Endoh | 6 | 155 | 35.26 |
| Hideo Ohno | 7 | 123 | 33.57 |
| Takahiro Hanyu | 8 | 441 | 78.58 |