Title
A negative-resistance sense amplifier for low-voltage operating STT-MRAM
Abstract
This paper exhibits a 65-NM 8-Mb spin transfer torque magnetoresistance random access memory (STT-MRAM) operating at 0.38V. The proposed sense amplifier comprises a boosted-gate nMOS and negative-resistance pMOSes as loads, which maximizes the readout margin. The STT-MRAM achieves a cycle time of 1.9 μs (= 0.526 MHz) at 0.38 V. The operating power is 1.70 μW at that voltage.
Year
DOI
Venue
2015
10.1109/ASPDAC.2015.7058920
ASP-DAC
Field
DocType
Citations 
Sense amplifier,NMOS logic,Computer science,Voltage,Negative resistance,Magnetoresistive random-access memory,Electronic engineering,Low voltage,Spin-transfer torque,Electrical engineering,Random access
Conference
2
PageRank 
References 
Authors
0.37
1
8
Name
Order
Citations
PageRank
Yohei Umeki121.72
Koji Yanagida2164.70
Shusuke Yoshimoto33012.56
Shintaro Izumi48231.56
masahiko yoshimoto511734.06
Hiroshi Kawaguchi63721.08
Koji Tsunoda721.04
T. Sugii8214.18