Name
Title | ||
|---|---|---|
A Timing Driven Cycle-Accurate Simulation for Coarse-Grained Reconfigurable Architectures. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1007/978-3-319-16214-0_24 | ARC |
Field | DocType | Citations |
Efficient energy use,Computer science,Degree of parallelism,Inverse discrete cosine transform,Parallel computing,Embedded applications | Conference | 0 |
PageRank | References | Authors |
0.34 | 14 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Anupam Chattopadhyay | 1 | 318 | 62.76 |
| Xiaolin Chen | 2 | 49 | 4.00 |