Name
Abstract | ||
|---|---|---|
Memory management is a challenging issue of multi-core architecture. With growing core numbers, Distributed Shared Memory (DSM) is becoming a general trend. In this paper, a DSM based multi-core architecture is explored and evaluated via an H.264 decoder application. The memory access and communication over Network-on-Chips is managed by the Data Management Engine (DME). Experimental results realized on an Altera Stratix VI show that 9-node distributed memory system increases performance by 1.5x compared to centralized memory. Moreover, the performance of proposed DSM architecture grows linearly with the number of cores deployed. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1109/ISSoC.2013.6675256 | ISSoC |
Keywords | Field | DocType |
dme,h.264 decoder,distributed shared memory,distributed memory systems,multi-core,multicore architecture,memory access,data management engine,altera stratix vi,network-on-chips,fpga,multicore h.264 decoder,distributed memory management,field programmable gate arrays,network-on-chip,dsm,video codecs,network on chip | Registered memory,Extended memory,Uniform memory access,Shared memory,Computer science,Parallel computing,Distributed memory,Real-time computing,Memory management,Non-uniform memory access,Distributed shared memory,Embedded system | Conference |
Citations | PageRank | References |
1 | 0.36 | 5 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jiajie Zhang | 1 | 1336 | 168.98 |
| Zheng Yu | 2 | 3 | 0.72 |
| Zhiyi Yu | 3 | 81 | 18.24 |
| Kexin Zhang | 4 | 8 | 5.08 |
| Zhonghai Lu | 5 | 1063 | 100.12 |
| Axel Jantsch | 6 | 1875 | 169.83 |