Paper Info
Title
Blocker tolerant wideband continuous time sigma-delta modulator for wireless applications
Abstract
A continuous-time low-pass ΔΣ ADC equipped with design techniques to provide robustness against saturation due to blockers is presented. An integrated low pass blocker filter that reduces the most critical adjacent/alternate channel blockers by 7/11 dB, respectively is implemented at the input of the ADC. The blocker filter is power efficient, highly linear and its noise is shaped out of signal band. Measurement results show that the proposed ADC implemented in a 90-nm digital CMOS process achieves 69 dB dynamic range over a 20 MHz bandwidth with a sampling frequency of 500 MHz and 17.1 mW of power consumption. The alternate channel blocker tolerance at the most critical frequency is -12.5 dBFS in the presence of a -12 dBFS in-band signal while the conventional modulator becomes unstable for -23.5 dBFS blocker power. The proposed integrated blocker filter is non-invasive, low power (1.4mW) and does not degrade the stability of the ΔΣ loop.
Year
DOI
Venue
2014
10.1109/MWSCAS.2014.6908527
Circuits and Systems
Keywords
Field
DocType
continuous time systems,low-pass filters,sigma-delta modulation,δς loop stability,blocker power,blocker tolerant wideband continuous time sigma-delta modulator,channel blocker tolerance,continuous-time low-pass δς adc,design technique,digital cmos process,frequency 500 mhz,in-band signal,integrated blocker filter,integrated low-pass blocker filter,noninvasive blocker filter,power 17.1 mw,power consumption,power efficiency,sampling frequency,size 90 nm,wireless application
Wideband,Wireless,Computer science,Delta-sigma modulation,Electronic engineering,Electrical engineering
Conference
ISSN
Citations 
PageRank 
1548-3746
0
0.34
References 
Authors
2
4
Name
Order
Citations
PageRank
hemasundar mohan geddada131.08
Chang-joon Park27713.94
Jose Silva-Martinez363086.56
aydin ilker karsilayan4185.80