Paper Info
Title
8.7 A 4-to-10.5Gb/s 2.2mW/Gb/s continuous-rate digital CDR with automatic frequency acquisition in 65nm CMOS
Abstract
Continuous-rate clock-and-data recovery (CDR) circuits with automatic frequency acquisition offer flexibility in both optical and electrical communication networks, and minimize cost with a single-chip multi-standard solution. The two major challenges in the design of such a CDR are: (a) extracting the bit-rate from the incoming random data stream, and (b) designing a wide-tuning-range low-noise oscillator. Among all available frequency detectors (FDs), the stochastic divider-based approach has the widest frequency acquisition range and is well suited for sub-rate CDRs [1]. However, its accuracy strongly depends on input transition density (0 ≤ ρ ≤ 1), with any deviation of ρ from 0.5 (50% transition density) causing 2×(ρ-0.5)×106 ppm of frequency error. In this paper, we present an automatic frequency-acquisition scheme that has unlimited range and is immune to variations in transition density. Implemented using a conventional bang-bang phase detector (BBPD), it requires minimum additional hardware and is applicable to sub-rate CDRs as well. Instead of using multiple LC oscillators that are carefully designed to cover a wide frequency range [2,3], a ring-oscillator-based fractional-N PLL is used as a digitally controlled oscillator (DCO) to achieve both wide range and low noise, and to decouple the tradeoff between jitter transfer (JTRAN) bandwidth and ring-oscillator-noise suppression.
Year
DOI
Venue
2014
10.1109/ISSCC.2014.6757377
Solid-State Circuits Conference Digest of Technical Papers
Keywords
DocType
ISSN
cmos digital integrated circuits,circuit tuning,clock and data recovery circuits,interference suppression,jitter,oscillators,phase detectors,phase locked loops,bbpd,cmos technology,dco,lc oscillators,automatic frequency acquisition,bang-bang phase detector,bit rate 4 gbit/s to 10.5 gbit/s,clock and data recovery circuit,continuous-rate digital cdr,digitally controlled oscillator,frequency detectors,jitter transfer,low noise oscillator,ring oscillator based fractional-n pll,ring oscillator noise suppression,single-chip multistandard solution,size 65 nm,wide tuning range
Conference
0193-6530
Citations 
PageRank 
References 
8
0.67
2
Authors
6
Name
Order
Citations
PageRank
Guanghua Shu1579.11
Woo-Seok Choi210512.58
Saurabh Saxena317416.84
Tejasvi Anand411016.98
Amr Elshazly524228.08
Pavan Kumar Hanumolu655484.82