Title | ||
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An improved low-voltage low-power CMOS comparator to be used in high-speed pipeline ADCs |
Abstract | ||
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This paper presents an improved low-voltage low- power CMOS comparator suitable for high-speed pipeline ADCs. Simulated results of the proposed circuit in a 0.35µm standard CMOS technology operating at supply voltages within the range of 1.0-1.5 Volt show that, this comparator achieves low offset, reduced kickback noise, high mean-time to failure and exhibits low-power dissipation at very high-speed operation. |
Year | DOI | Venue |
---|---|---|
2002 | 10.1109/ISCAS.2002.1010660 | Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium |
Keywords | Field | DocType |
CMOS integrated circuits,analogue-digital conversion,comparators (circuits),high-speed integrated circuits,integrated circuit noise,integrated circuit reliability,low-power electronics,pipeline processing,0.35 micron,1.0 to 1.5 V,high-speed pipeline ADCs,kickback noise,low-power CMOS comparator,mean-time to failure,power dissipation,supply voltages | Pipeline transport,Comparator,Preamplifier,Computer science,Voltage,Electronic engineering,CMOS,Low voltage,Comparator applications,Electrical engineering,Low-power electronics | Conference |
Volume | Citations | PageRank |
5 | 9 | 1.45 |
References | Authors | |
3 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Pedro Amaral | 1 | 9 | 1.78 |
João Goes | 2 | 88 | 27.95 |
Nuno F. Paulino | 3 | 72 | 24.92 |
Adolfo Steiger-Garcao | 4 | 166 | 11.37 |