| Analysis Of Capacitance Spread Reduction Techniques For 50-Hz Switched-Capacitor Notch Filters | 0 | 0.34 | 2020 |
| A Systematic Design Methodology for Optimization of Sigma-Delta Modulators Based on an Evolutionary Algorithm | 0 | 0.34 | 2019 |
| A 0.9-V Analog-to-Digital Acquisition Channel for an IoT Water Management Sensor Node. | 1 | 0.39 | 2019 |
| Live Demonstration: An Automated Test Bench for an 130nm SC DC-DC Converter | 0 | 0.34 | 2018 |
| A 0.9-V Programmable Second-Order Bandpass Switched-Capacitor Filter for IoT Applications. | 0 | 0.34 | 2018 |
| A 130 nm CMOS Power Management Unit With a Multi-Ratio Core SC DC-DC Converter for a Supercapacitor Power Supply. | 0 | 0.34 | 2018 |
| Experimental Set-up for an IoT Power Supply with an 130 nm SC DC-DC Converter. | 0 | 0.34 | 2018 |
| A Third-Order MASH $\Sigma \Delta $ Modulator Using Passive Integrators. | 3 | 0.38 | 2017 |
| Design Methodology for an All CMOS Bandgap Voltage Reference Circuit. | 0 | 0.34 | 2017 |
| A 3rd order MASH switched-capacitor ΣΔM using ultra incomplete settling employing an area reduction technique. | 0 | 0.34 | 2017 |
| A Numerical Methodology for the Analysis of Switched-Capacitor Filters Taking Into Account Non-Ideal Effects of Switches and Amplifiers. | 0 | 0.34 | 2017 |
| 15.3 A 1V 77dB-DR 72dB-SNDR 10MHz-BW 2-1 MASH CT ΔΣM. | 1 | 0.49 | 2016 |
| CMOS Indoor Light Energy Harvesting System for Wireless Sensing Applications: An Overview. | 0 | 0.34 | 2016 |
| Analysis and implementation of a power management unit with a multiratio switched capacitor DC-DC converter for a supercapacitor power supply | 0 | 0.34 | 2016 |
| A current-mode VCO-based amplifier-less 2nd-order ΔΣ modulator with over 85dB SNDR. | 0 | 0.34 | 2015 |
| Analysis of a Multi-Ratio Switched Capacitor DC-DC Converter for a Supercapacitor Power Supply. | 0 | 0.34 | 2015 |
| A Simple Class-D Audio Power Amplifier Using A Passive Ct Sigma Delta Modulator For Medium Quality Sound Systems | 0 | 0.34 | 2015 |
| A 0.7 V 256 μW ΔΣ modulator with passive RC integrators achieving 76 dB DR in 2 MHz BW | 2 | 0.40 | 2015 |
| A Top-Down Optimization Methodology for SC Filter Circuit Design Using Varying Goal Specifications. | 1 | 0.38 | 2014 |
| A top-down optimization methodology for SC filter circuit design | 3 | 0.50 | 2014 |
| A low power 4th order MASH switched-capacitor ΣΔ modulator using ultra incomplete settling | 0 | 0.34 | 2014 |
| A 0.4-V 410-nW opamp-less continuous-time ΣΔ modulator for biomedical applications | 2 | 0.45 | 2014 |
| A hybrid current-mode passive second-order continuous-time ΣΔ modulator | 1 | 0.36 | 2014 |
| The design of a light barrier system as an undergraduate laboratory project | 1 | 0.43 | 2014 |
| The design of an audio power amplifier as a class project for undergraduate students | 1 | 0.43 | 2013 |
| A Switched-Capacitor Band-Pass Biquad Filter Using a Simple Quasi-unity Gain Amplifier. | 1 | 0.39 | 2013 |
| A simple 1 GHz non-overlapping two-phase clock generators for SC circuits | 0 | 0.34 | 2013 |
| Design of a 3rd Order 1.5-Bit Continuous-Time Fully Differential Sigma-Delta (Sigma Delta) Modulator Optimized for a Class D Audio Amplifier Using Differential Pairs | 0 | 0.34 | 2013 |
| Design of a Fully Differential Power Output Stage for a Class D Audio Amplifier Using a Single-Ended Power Supply. | 0 | 0.34 | 2013 |
| Current-Mode Reference Shifting Solution For Mdac-Based Analog-To-Digital Converters | 0 | 0.34 | 2012 |
| Design Methodology For Sigma-Delta Modulators Based On A Genetic Algorithm Using Hybrid Cost Functions | 11 | 1.18 | 2012 |
| A 1.2 V 300 μW second-order switched-capacitor Δ∑ modulator using ultra incomplete settling with 73 dB SNDR and 300 kHz BW in 130 nm CMOS. | 3 | 0.63 | 2011 |
| A second-order switched-capacitor ΔΣ modulator using very incomplete settling | 1 | 0.40 | 2011 |
| Multi-bit sigma-delta modulators with enhanced dynamic-range using non-linear DAC for hearing aids. | 0 | 0.34 | 2008 |
| New low-power 1.5-bit time-interleaved MDAC based on MOS capacitor amplification. | 2 | 0.43 | 2008 |
| A 0.9V /spl Delta//spl Sigma/ Modulator with 80dB SNDR and 83dB DR Using a Single-Phase Technique | 8 | 3.01 | 2006 |
| Low-Voltage Low-Power Broadband Cmos Analogue Circuit For White Gaussian Noise Generation | 1 | 0.35 | 2006 |
| Low-power low-voltage CMOS A/D sigma-delta modulator for bio-potential signals driven by a single-phase scheme | 6 | 0.75 | 2005 |
| Switched-capacitor circuits using a single-phase scheme | 1 | 2.90 | 2005 |
| Design of a digitally programmable delay-locked-loop for a low-cost ultra wide band radar receiver | 1 | 0.40 | 2003 |
| An improved low-voltage low-power CMOS comparator to be used in high-speed pipeline ADCs | 9 | 1.45 | 2002 |
| Design of low-voltage CMOS pipelined ADCs using 1 pico-Joule of energy per conversion | 5 | 0.97 | 2002 |
| Design methodology for optimization of analog building blocks using genetic algorithms | 7 | 1.10 | 2001 |
