Name
Abstract | ||
|---|---|---|
Asynchronous/self-timed circuits are beginning to attract renewed attention as a promising means of dealing with the complexity of modern VLSI designs. Very few analysis techniques or tools are available for estimating their performance. We adapt the theory of generalized timed Petri-nets (GTPN) for analyzing and comparing asynchronous circuits ranging from purely control-oriented circuits to those with data dependent control. Experiments with the GTPN analyzer are found to track the observed performance of actual asynchronous circuits, thereby offering empirical evidence towards the soundness of the modeling approach |
Year | DOI | Venue |
|---|---|---|
1994 | 10.1109/ICCD.1994.331892 | Cambridge, MA |
Keywords | Field | DocType |
Petri nets,VLSI,circuit reliability,logic testing,sequential circuits,GTPN,asynchronous circuits,circuit optimization,control-oriented circuits,data dependent control,generalized timed Petri-nets,modeling approach,modern VLSI designs,observed performance,performance analysis,self-timed circuits | Asynchronous communication,Petri net,Sequential logic,Computer science,Circuit reliability,Electronic engineering,Real-time computing,Ranging,Soundness,Electronic circuit,Very-large-scale integration | Conference |
ISSN | ISBN | Citations |
1063-6404 | 0-8186-6565-3 | 21 |
PageRank | References | Authors |
1.09 | 8 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Prabhakar Kudva | 1 | 438 | 56.96 |
| Ganesh Gopalakrishnan | 2 | 1619 | 130.11 |
| Erik Brunvand | 3 | 509 | 66.09 |
| Venkatesh Akella | 4 | 357 | 33.69 |