Name
Abstract | ||
|---|---|---|
A technique to increase the common-mode rejection ratio of traditional current output stage is presented. The solution exploits an auxiliary high-gain feedback loop which also approximately doubles the differential transconductance. SPICE simulations using the model parameters of a 0.8-μm CMOS process arc found in remarkable agreement with expected results. |
Year | DOI | Venue |
|---|---|---|
2003 | 10.1109/ICECS.2003.1301842 | Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 10th IEEE International Conference |
Keywords | DocType | Volume |
CMOS analogue integrated circuits,SPICE,feedback amplifiers,operational amplifiers,CMOS process,SPICE simulations,auxiliary high-gain feedback loop,common-mode rejection ratio,complementary source-coupled pairs,current operational amplifiers,current output stage,differential transconductance,model parameters | Conference | 2 |
ISBN | Citations | PageRank |
0-7803-8163-7 | 0 | 0.34 |
References | Authors | |
1 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Francesco Centurelli | 1 | 56 | 15.93 |
| Salvatore Pennisi | 2 | 437 | 71.32 |
| A. Trifiletti | 3 | 433 | 63.29 |