Paper Info
Title
Design and development of 130-nanometer ICs for a multi-Gigabit switching network system
Abstract
A system-centric, fully-hierarchical design methodology and design techniques developed to create four ICs, which provide the core functionality of a multi-Gigabit switching network system, are presented. The system is capable of switching more than 500 million packets per second. Electrical and physical design methods for one IC are described. ∼76 M transistors are integrated in a 130 nm CMOS 8-metal process. Functional and electrical design requirements were achieved with the first silicon.
Year
DOI
Venue
2004
10.1109/CICC.2004.1358809
CICC
Keywords
Field
DocType
cmos integrated circuits,integrated circuit design,packet switching,switching circuits,switching networks,130 nm,cmos,multigigabit switching network system,packet networking systems,system-centric fully-hierarchical design,physical design,design methodology,signal integrity,indexing terms
Gigabit,Computer science,Network packet,CMOS,Electronic engineering,Integrated circuit design,Packet switching,Physical design,Transistor,Integrated circuit
Conference
ISBN
Citations 
PageRank 
0-7803-8495-4
0
0.34
References 
Authors
2
32
Name
Order
Citations
PageRank
Aurangzeb Khan1124.69
kamalesh n ruparel200.34
Cyril Joly334.46
v ghanta400.34
d le500.34
Truong Q. Nguyen61402136.69
jianning yu700.34
siqi yang800.34
Ijaz Ahmed9184.10
n burnside1000.34
v chagarlamudi1100.34
mitchell cheung1200.34
f chiu1361.86
f chiu1461.86
Yiping Fan1545625.67
john j gill1600.34
potsang huang1700.34
v jayapal1800.34
o kim1900.34
mingfu li2000.34
hoyin mak2100.34
p mckeever2200.34
s nguyen2300.34
k k rajan2400.34
stuart a riley2500.34
p tran2600.34
hiep truong2700.34
Ann-Ping Tsou2819219.67
Daoping Wang2927.52
Chia-Lin Yang30103376.39
j zhang3100.34
xuan zhong3200.34