| Subset Selection for Hybrid Task Scheduling with General Cost Constraints | 0 | 0.34 | 2022 |
| RM-SSD: In-Storage Computing for Large-Scale Recommendation Inference | 0 | 0.34 | 2022 |
| A Forward Speculative Interference Attack | 0 | 0.34 | 2022 |
| Efficient Bad Block Management with Cluster Similarity | 0 | 0.34 | 2022 |
| Efficient and Atomic-Durable Persistent Memory through In-PM Hybrid Logging | 0 | 0.34 | 2022 |
| Development and Evaluation of an Attendance Tracking System Using Smartphones with GPS and NFC | 0 | 0.34 | 2022 |
| Analyzing the Interplay Between Random Shuffling and Storage Devices for Efficient Machine Learning | 0 | 0.34 | 2021 |
| A Dense Tensor Accelerator With Data Exchange Mesh For Dnn And Vision Workloads | 0 | 0.34 | 2021 |
| Flash Embedding: Storing Embedding Tables in SSD for Large-Scale Recommender Systems | 0 | 0.34 | 2021 |
| Binarized SNNs: Efficient and Error-Resilient Spiking Neural Networks through Binarization | 0 | 0.34 | 2021 |
| Lattice: An Adc/Dac-Less Reram-Based Processing-In-Memory Architecture For Accelerating Deep Convolution Neural Networks | 1 | 0.36 | 2020 |
| Sparse ReRAM engine: joint exploration of activation and weight sparsity in compressed neural networks | 13 | 0.54 | 2019 |
| LIRS: Enabling efficient machine learning on NVM-based storage via a lightweight implementation of random shuffling. | 0 | 0.34 | 2018 |
| A Novel Design and Fabrication of Tactile Sensor for Humanoid Robot Finger | 0 | 0.34 | 2018 |
| Efficient and Robust Parallel DNN Training through Model Parallelism on Multi-GPU Platform. | 1 | 0.35 | 2018 |
| DL-RSIM: A Simulation Framework to Enable Reliable ReRAM-based Accelerators for Deep Learning | 6 | 0.50 | 2018 |
| Data Replica Placement Mechanism for Open Heterogeneous Storage Systems. | 1 | 0.36 | 2017 |
| Improving GPGPU Performance via Cache Locality Aware Thread Block Scheduling. | 3 | 0.36 | 2017 |
| Recap of the 2017 International Symposium on Low Power Electronics and Design (ISLPED). | 0 | 0.34 | 2017 |
| A Hybrid DRAM/PCM Buffer Cache Architecture for Smartphones with QoS Consideration. | 0 | 0.34 | 2017 |
| Leave the Cache Hierarchy Operation as It Is: A New Persistent Memory Accelerating Approach. | 1 | 0.35 | 2017 |
| Exploiting Write Heterogeneity of Morphable MLC/SLC SSDs in Datacenters with Service-Level Objectives. | 7 | 0.51 | 2017 |
| Latency sensitivity-based cache partitioning for heterogeneous multi-core architecture. | 3 | 0.39 | 2016 |
| MCSSim: A memory channel storage simulator | 0 | 0.34 | 2016 |
| Improving Read Performance of NAND Flash SSDs by Exploiting Error Locality. | 8 | 0.48 | 2016 |
| A buffer cache architecture for smartphones with hybrid DRAM/PCM memory | 6 | 0.43 | 2015 |
| Thermal/performance characterization of CMPs with 3D-stacked DRAMs under synergistic voltage-frequency control of cores and DRAMs | 2 | 0.37 | 2015 |
| LUTSim: A Look-Up Table Based Thermal Simulator for 3-D ICs | 0 | 0.34 | 2015 |
| Improving DRAM latency with dynamic asymmetric subarray | 18 | 0.53 | 2015 |
| SECRET: A Selective Error Correction Framework for Refresh Energy Reduction in DRAMs | 4 | 0.42 | 2015 |
| Fine-grained write scheduling for PCM performance improvement under write power budget | 3 | 0.37 | 2015 |
| System-Level Performance and Power Optimization for MPSoC: A Memory Access-Aware Approach | 0 | 0.34 | 2015 |
| NVM duet: unified working memory and persistent store architecture | 36 | 1.12 | 2014 |
| Guest Editors' Introduction: Cloud Computing for Embedded Systems. | 0 | 0.34 | 2014 |
| EC-Cache: Exploiting Error Locality to Optimize LDPC in NAND Flash-Based SSDs | 10 | 0.49 | 2014 |
| Full system simulation framework for integrated CPU/GPU architecture | 2 | 0.40 | 2014 |
| Exploring synergistic DVFS control of cores and DRAMs for thermal efficiency in CMPs with 3D-stacked DRAMs | 1 | 0.36 | 2013 |
| Thermal coupling aware task migration using neighboring core search for many-core systems | 2 | 0.36 | 2013 |
| DuraCache: A durable SSD cache using MLC NAND flash | 20 | 0.80 | 2013 |
| Age-based PCM wear leveling with nearly zero search cost | 45 | 1.66 | 2012 |
| A cycle-level SIMT-GPU simulation framework | 5 | 0.50 | 2012 |
| Optimizing NAND flash-based SSDs via retention relaxation | 62 | 2.09 | 2012 |
| Power gating strategies on GPUs | 20 | 0.83 | 2011 |
| TACLC: Timing-Aware Cache Leakage Control for Hard Real-Time Systems | 3 | 0.41 | 2011 |
| A SAT-based routing algorithm for cross-referencing biochips | 6 | 0.64 | 2011 |
| A Study of a Heuristic Capacity Planning Algorithm for Weapon Production System. | 0 | 0.34 | 2011 |
| Thermal Modeling and Analysis for 3-D ICs With Integrated Microchannel Cooling | 14 | 0.79 | 2011 |
| PM-COSYN: PE and memory co-synthesis for MPSoCs | 1 | 0.38 | 2010 |
| Hierarchical memory scheduling for multimedia MPSoCs | 4 | 0.44 | 2010 |
| Parallelization and characterization of GARCH option pricing on GPUs | 0 | 0.34 | 2010 |
