Name
Abstract | ||
|---|---|---|
Reed Solomon codes are widely used to identify and correct data errors in transmission and storage systems. Due to the vital importance of these blocks, a very important research topic is the study of the effects of faults on their behavior. The presented architecture exploits some properties of the arithmetic operations on GF(2n) Galois field, related to the parity of the binary representation of the elements of the field. The encoder has been mapped on an SRAM based FPGA, the self-checking property has been analyzed using a SEU fault model and the performances in terms of area and delay overhead are presented. |
Year | DOI | Venue |
|---|---|---|
2005 | 10.1109/DFTVS.2005.13 | DFT |
Keywords | Field | DocType |
Galois fields,Reed-Solomon codes,SRAM chips,digital arithmetic,error correction codes,fault diagnosis,field programmable gate arrays,GF(2n) Galois field,Reed Solomon codes,SEU fault model,SRAM based FPGA device,arithmetic operations,binary representation,data error correction,self checking Reed Solomon encoder | Finite field,Computer science,Field-programmable gate array,Arithmetic,Reed–Solomon error correction,Static random-access memory,Encoder,Galois theory,Fault model,Binary number | Conference |
ISSN | ISBN | Citations |
1550-5774 | 0-7695-2464-8 | 7 |
PageRank | References | Authors |
0.84 | 8 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Gian-Carlo Cardarilli | 1 | 57 | 14.97 |
| Salvatore Pontarelli | 2 | 368 | 54.05 |
| Marco Re | 3 | 194 | 35.03 |
| A. Salsano | 4 | 90 | 13.37 |