Name
Title | ||
|---|---|---|
A Design Procedure for All-Digital Phase-Locked Loops Based on a Charge-Pump Phase-Locked-Loop Analogy |
Abstract | ||
|---|---|---|
In this brief, a systematic design procedure for a second-order all-digital phase-locked loop (PLL) is proposed. The design procedure is based on the analogy between a type-II second-order analog PLL and an all-digital PLL. The all-digital PLL design inherits the frequency response and stability charac- teristics of the analog prototype PLL. Index Terms—All-digital phase-locked loop (PLL), bilinear transform, digital loop filter, digitally controlled oscillator. |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1109/TCSII.2006.889443 | Circuits and Systems II: Express Briefs, IEEE Transactions |
Keywords | Field | DocType |
digital filters,digital phase locked loops,oscillators,all-digital phase-locked loops,bilinear transform,charge-pump phase-locked-loop,digital loop filter,digitally controlled oscillator,type-II second-order analog PLL,All-digital phase-locked loop (PLL),bilinear transform,digital loop filter,digitally controlled oscillator | Digitally controlled oscillator,Phase-locked loop,Oscillation,Frequency response,Digital filter,Control theory,PLL multibit,Electronic engineering,Bilinear transform,Analogy,Mathematics | Journal |
Volume | Issue | ISSN |
54 | 3 | 1549-7747 |
Citations | PageRank | References |
46 | 4.60 | 8 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Volodymyr Kratyuk | 1 | 84 | 11.41 |
| Pavan Kumar Hanumolu | 2 | 240 | 27.03 |
| Un-Ku Moon | 3 | 836 | 140.98 |
| Kartikeya Mayaram | 4 | 349 | 58.50 |