Title
A Low-Complexity, Low-Phase-Noise, Low-Voltage Phase-Aligned Ring Oscillator in 90 nm Digital CMOS
Abstract
An 8-phase phase-aligned ring oscillator in 90 nm digital CMOS is presented that operates up to 2 GHz. The low-complexity circuit consumes 13 mW at 2 GHz and 1.2 mW at 400 MHz, while a flat in-band phase noise below -120 dBc/Hz is achieved, in close agreement with the presented theory. The circuit occupies an area of 0.008 mm2 .
Year
DOI
Venue
2009
10.1109/JSSC.2009.2020231
Solid-State Circuits, IEEE Journal of
Keywords
Field
DocType
cmos digital integrated circuits,uhf integrated circuits,uhf oscillators,low-power electronics,phase noise,digital cmos technology,flat in-band phase noise,frequency 2 ghz,frequency 400 mhz,phase-aligned ring oscillator,power 1.2 mw,power 13 mw,size 90 nm,cmos,clock multiplier,low-voltage,realignment,ring oscillator,jitter,transceivers,low voltage,circuits,inductors,frequency,low power electronics,cmos integrated circuits
Ring oscillator,Computer science,Phase noise,Electronic engineering,Frequency multiplier,CMOS,Low voltage,dBc,CPU multiplier,Low-power electronics
Journal
Volume
Issue
ISSN
44
7
0018-9200
Citations 
PageRank 
References 
8
0.78
3
Authors
6
Name
Order
Citations
PageRank
Jonathan Borremans122130.47
Julien Ryckaert231151.54
Claude Desset393184.11
Maarten Kuijk411119.16
Piet Wambacq552996.10
Jan Craninckx6756181.43