Analysis and Design of a CMOS Ultra-High-Speed Burst Mode Imager with In-Situ Storage Topology Featuring In-Pixel CDS Amplification. | 0 | 0.34 | 2018 |
An Adaptive Frame Image Sensor with Fine-Grained Power Management for Ultra-Low Power Internet of Things Application. | 0 | 0.34 | 2018 |
A 0.9 V 0.4-6 GHz Harmonic Recombination SDR Receiver in 28 nm CMOS With HR3/HR5 and IIP2 Calibration. | 1 | 0.35 | 2014 |
IIP2 and HR calibration for an 8-phase harmonic recombination receiver in 28nm. | 5 | 0.57 | 2013 |
A Generic Framework for Optimizing Digital Intensive Harmonic Rejection Receivers | 5 | 0.58 | 2012 |
A 40nm CMOS highly linear 0.4-to-6GHz receiver resilient to 0dBm out-of-band blockers. | 15 | 2.09 | 2011 |
A 40 nm CMOS 0.4-6 GHz Receiver Resilient to Out-of-Band Blockers. | 43 | 3.03 | 2011 |
A multiband LTE SAW-less modulator with −160dBc/Hz RX-band noise in 40nm LP CMOS | 8 | 0.92 | 2011 |
Saw-Less Software-Defined Radio Transceivers In 40nm Cmos | 9 | 0.89 | 2011 |
A standard cell based all-digital Time-to-Digital Converter with reconfigurable resolution and on-line background calibration | 4 | 0.51 | 2011 |
A sub-3dB NF voltage-sampling front-end with +18dBm IIP 3 and +2dBm blocker compression point | 9 | 1.58 | 2010 |
A 86MHz-to-12GHz digital-intensive phase-modulated fractional-N PLL using a 15pJ/Shot 5ps TDC in 40nm digital CMOS. | 1 | 0.36 | 2010 |
A Low-Complexity, Low-Phase-Noise, Low-Voltage Phase-Aligned Ring Oscillator in 90 nm Digital CMOS | 8 | 0.78 | 2009 |
A 2.4 GHz Low-Power Sixth-Order RF Bandpass ΔΣ Converter in CMOS. | 1 | 0.38 | 2009 |
A Fully Integrated 7.3 kV HBM ESD-Protected Transformer-Based 4.5–6 GHz CMOS LNA | 4 | 1.27 | 2009 |
A digitally controlled compact 57-to-66GHz front-end in 45nm digital CMOS. | 6 | 1.31 | 2009 |
A 400 μW 4.7-to-6.4GHz VCO under an Above-IC Inductor in 45nm CMOS. | 1 | 0.59 | 2008 |
Low-Area Active-Feedback Low-Noise Amplifier Design in Scaled Digital CMOS | 33 | 3.15 | 2008 |
A low-complexity, low phase noise, low-voltage phase-aligned ring oscillator in 90 nm digital CMOS. | 0 | 0.34 | 2008 |
A 52 Ghz Phased-Array Receiver Front-End In 90 Nm Digital Cmos | 23 | 4.23 | 2008 |
A Compact Wideband Front-End Using a Single-Inductor Dual-Band VCO in 90 nm Digital CMOS | 21 | 1.75 | 2008 |
Advanced Planar Bulk and Multigate CMOS Technology: Analog-Circuit Benchmarking up to mm-Wave Frequencies. | 0 | 0.34 | 2008 |
Nonlinearity analysis of Analog/RF circuits using combined multisine and volterra analysis | 5 | 0.98 | 2007 |
The Potential of FinFETs for Analog and RF Circuit Applications | 7 | 0.76 | 2007 |
An ESD-Protected DC-to-6GHz 9.7mW LNA in 90nm Digital CMOS | 12 | 3.04 | 2007 |