Title
A novel 4-to-3 step-down on-chip SC DC-DC converter with reduced bottom-plate loss
Abstract
This paper presents a novel fully integrated on-chip switched-capacitor (SC) DC-DC converter that supports programmable regulated load voltage ranging from 2.6V to 3.2V out of 5V input supply. MOS capacitors are used for flying capacitors (600pF) and load capacitor (400pF) in this implementation. To minimize the bottom-plate parasitic capacitor related loss while maximizing the load current driving capability, the proposed 4-to-3 step-down topology utilizes two differently sized conventional 2-to-1 step-down topologies, each of which has different value of flying capacitor. In addition, the proposed implementation reduces switching loss and control circuit loss since the internally generated output voltage of the bottom 2-to-1 block is used as the supply for the control circuits throughout the small internal LDO regulator. The proposed converter is designed and simulated using high-voltage 0.35 μm BCDMOS technology. The programmable output voltage is regulated by means of pulse frequency modulation (PFM) technique using 18-bit shift register and digitally controlled oscillator (DCO). The proposed switched-capacitor converter achieves the peak efficiency of 72% while it delivers the load current between 1mA and 10mA. 10-phase interleaving technique enables the output voltage ripple of the load voltage to be less than 1%.
Year
DOI
Venue
2012
10.1109/MWSCAS.2012.6292206
Circuits and Systems
Keywords
Field
DocType
dc-dc power convertors,mos capacitors,10-phase interleaving technique,2-to-1 step-down topologies,4-to-3 step-down topology,bcdmos technology,bottom-plate loss,bottom-plate parasitic capacitor,capacitance 400 pf,capacitance 600 pf,control circuit loss,current 1 ma,current 10 ma,digitally controlled oscillator,flying capacitors,load capacitor,on-chip sc dc-dc converter,on-chip switched-capacitor dc-dc converter,programmable regulated load voltage ranging,pulse frequency modulation technique,shift register,size 0.35 mum,small internal ldo regulator,switched-capacitor converter,switching loss,voltage 2.6 v to 3.2 v,voltage 5 v,word length 18 bit,topology,system on a chip,capacitors,capacitance
Boost converter,Computer science,Forward converter,Control engineering,Ćuk converter,Electronic engineering,Voltage regulation,Voltage multiplier,Charge pump,Electrical engineering,Low-dropout regulator,Constant power circuit
Conference
ISSN
ISBN
Citations 
1548-3746 E-ISBN : 978-1-4673-2525-7
978-1-4673-2525-7
1
PageRank 
References 
Authors
0.36
5
3
Name
Order
Citations
PageRank
Heungjun Jeon1263.63
Yong-bin Kim233855.72
Kyung Ki Kim39921.62